ELF > �Y @ @ " ! GNU ��J!*�����e\�!��q� Linux Linux 6.1.0-40-amd64 � H�� H�� � H�� � license=GPL v2 description=Intel Lakefield PCH pinctrl/GPIO driver author=Andy Shevchenko <andriy.shevchenko@linux.intel.com> alias=acpi*:INT34C4:* depends= retpoline=Y intree=Y name=pinctrl_lakefield vermagic=6.1.0-40-amd64 SMP preempt mod_unload modversions lakefield-pinctrl MDSI_A_TE0 MDSI_A_TE1 PANEL0_AVDD_EN PANEL0_BKLTEN PANEL0_BKLTCTL PANEL1_AVDD_EN PANEL1_BKLTEN PANEL1_BKLTCTL THC0_SPI1_IO_0 THC0_SPI1_IO_1 THC0_SPI1_IO_2 THC0_SPI1_IO_3 THC0_SPI1_CSB THC0_SPI1_CLK THC0_SPI1_RESETB THC0_SPI1_CLK_FB SPI_TOUCH_CLK_FB THC1_SPI2_IO_0 THC1_SPI2_IO_1 THC1_SPI2_IO_2 THC1_SPI2_IO_3 THC1_SPI2_CSB THC1_SPI2_CLK THC1_SPI2_RESETB THC1_SPI2_CLK_FB eSPI_IO_0 eSPI_IO_1 eSPI_IO_2 eSPI_IO_3 eSPI_CSB eSPI_RESETB eSPI_CLK eSPI_CLK_FB FAST_SPI0_IO_0 FAST_SPI0_IO_1 FAST_SPI0_IO_2 FAST_SPI0_IO_3 FAST_SPI0_CSB_0 FAST_SPI0_CSB_2 FAST_SPI0_CLK FAST_SPI_CLK_FB FAST_SPI0_CSB_1 ISH_GP_12 THC0_SPI1_INTB THC1_SPI2_INTB PANEL0_AVEE_EN PANEL0_VIO_EN PANEL1_AVEE_EN PANEL1_VIO_EN PANEL0_RESET PANEL1_RESET ISH_GP_15 ISH_GP_16 ISH_GP_17 ISH_GP_18 ISH_GP_19 ISH_GP_20 ISH_GP_21 ISH_GP_22 ISH_GP_23 MCSI_GPIO_0 MCSI_GPIO_1 MCSI_GPIO_2 MCSI_GPIO_3 LPSS_I2C0_SDA LPSS_I2C0_SCL LPSS_I2C1_SDA LPSS_I2C1_SCL LPSS_I2C2_SDA LPSS_I2C2_SCL LPSS_I2C3_SDA LPSS_I2C3_SCL LPSS_I2C4_SDA LPSS_I2C4_SCL LPSS_I2C5_SDA LPSS_I2C5_SCL LPSS_I3C0_SDA LPSS_I3C0_SCL LPSS_I3C0_SCL_FB LPSS_I3C1_SDA LPSS_I3C1_SCL LPSS_I3C1_SCL_FB ISH_I2C0_SDA ISH_I2C0_SCL ISH_I2C1_SCL ISH_I2C1_SDA DBG_PMODE BJTAG_TCK BJTAG_TDI BJTAGX BPREQ_B BJTAG_TMS BPRDY_B BJTAG_TDO BJTAG_TRST_B_0 ISH_I3C0_SDA ISH_I3C0_SCL ISH_I3C0_SCL_FB AVS_I2S_BCLK_0 AVS_I2S_MCLK_0 AVS_I2S_SFRM_0 AVS_I2S_RXD_0 AVS_I2S_TXD_0 AVS_I2S_BCLK_1 AVS_I2S_SFRM_1 AVS_I2S_RXD_1 AVS_I2S_TXD_1 AVS_I2S_BCLK_2 AVS_I2S_SFRM_2 AVS_I2S_RXD_2 AVS_I2S_TXD_2 AVS_I2S_BCLK_3 AVS_I2S_SFRM_3 AVS_I2S_RXD_3 AVS_I2S_TXD_3 AVS_I2S_BCLK_4 AVS_I2S_SFRM_4 AVS_I2S_RXD_4 AVS_I2S_TXD_4 AVS_I2S_SFRM_5 AVS_I2S_RXD_5 AVS_I2S_TXD_5 AVS_I2S_BCLK_5 AVS_SNDW_CLK_0 AVS_SNDW_DATA_0 AVS_SNDW_CLK_1 AVS_SNDW_DATA_1 AVS_SNDW_CLK_2 AVS_SNDW_DATA_2 AVS_SNDW_CLK_3 AVS_SNDW_DATA_3 VISA_PTI_CH0_D0_internal VISA_PTI_CH0_D1_internal VISA_PTI_CH0_D2_internal VISA_PTI_CH0_D3_internal VISA_PTI_CH0_D4_internal VISA_PTI_CH0_D5_internal VISA_PTI_CH0_D6_internal VISA_PTI_CH0_D7_internal VISA_PTI_CH0_CLK_internal VISA_PTI_CH1_D0_internal VISA_PTI_CH1_D1_internal VISA_PTI_CH1_D2_internal VISA_PTI_CH1_D3_internal VISA_PTI_CH1_D4_internal VISA_PTI_CH1_D5_internal VISA_PTI_CH1_D6_internal VISA_PTI_CH1_D7_internal VISA_PTI_CH1_CLK_internal LPSS_UART0_TXD LPSS_UART0_RXD LPSS_UART0_RTS_B LPSS_UART0_CTS_B LPSS_UART1_RXD LPSS_UART1_TXD LPSS_UART1_RTS_B LPSS_UART1_CTS_B ISH_UART0_RXD ISH_UART0_TXD ISH_UART0_RTSB ISH_UART0_CTSB LPSS_SSP_0_CLK LPSS_SSP_0_CLK_FB LPSS_SSP_0_FS0 LPSS_SSP_0_FS1 LPSS_SSP_0_RXD LPSS_SSP_0_TXD ISH_UART1_RXD ISH_UART1_TXD ISH_UART1_RTSB ISH_UART1_CTSB LPSS_SSP_1_FS0 LPSS_SSP_1_FS1 LPSS_SSP_1_CLK LPSS_SSP_1_CLK_FB LPSS_SSP_1_RXD LPSS_SSP_1_TXD LPSS_SSP_2_CLK LPSS_SSP_2_CLK_FB LPSS_SSP_2_FS0 LPSS_SSP_2_FS1 LPSS_SSP_2_RXD LPSS_SSP_2_TXD ISH_SPI0_CSB0 ISH_SPI0_CSB1 ISH_SPI0_CLK ISH_SPI0_MISO ISH_SPI0_MOSI ISH_GP_0 ISH_GP_1 ISH_GP_2 ISH_GP_13 ISH_GP_3 ISH_GP_4 ISH_GP_5 ISH_GP_6 ISH_GP_7 ISH_GP_8 ISH_GP_9 ISH_GP_10 ISH_GP_11 ISH_GP_14 ISH_GP_30_USB_OC LPDDRx_RESET0_n UFS_RESET_B UFS_REFCLK0 EMMC_SD_CLK EMMC_SD_D0 EMMC_SD_D1 EMMC_SD_D2 EMMC_SD_D3 EMMC_D4 EMMC_D5 EMMC_D6 EMMC_D7 EMMC_SD_CMD EMMC_RCLK SDCARD_CLK_FB SD_Virtual_GPIO OSC_CLK_OUT_NFC OSC_CLK_OUT_CAM_0 OSC_CLK_OUT_CAM_1 OSC_CLK_OUT_CAM_2 OSC_CLK_OUT_CAM_3 PCIe_LINKDOWN NFC_CLK_REQ PCIE_CLKREQ_N_DEV2 PCIE_CLKREQ_N_DEV3 PCIE_CLKREQ_N_DEV4 PCIE_CLKREQ_N_DEV1 PCIE_CLKREQ_N_DEV0 GMBUS_1_SCL GMBUS_1_SDA GMBUS_0_SCL GMBUS_0_SDA COMPUTE_PMIC_SVID_DATA COMPUTE_PMIC_SVID_CLK COMPUTE_PMIC_SVID_ALERT_B ROP_PMIC_I2C_SCL ROP_PMIC_I2C_SDA ISH_TYPEC_I2C2_SDA ISH_TYPEC_I2C2_SCL COMPUTE_PMU_PROCHOT_B PMU_CATERR_B COMPUTE_PMIC_VR_READY FORCE_FW_RELOAD ROP_PMIC_RESET_B ROP_PMIC_STNBY_SLP_S0_B ROP_PMIC_THERMTRIP_B MODEM_CLKREQ TPC0_BSSB_SBU1 TPC0_BSSB_SBU2 OSC_CLK_OUT_CAM_4 HPD1 HPD0 PMC_TIME_SYNC_0 PMC_TIME_SYNC_1 OSC_CLK_OUT_CAM_5 INT34C4 p � < p � < Y p � � Y p � � � � � � � � � < @ \ ` | �
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